Parva is my (blue_flycatcher) computer <3
v0.1
- 24-bit architecture
- 8 registers
- 120Hz
- 128 words of memory (384 bytes), expandable, 24-bit addressing
- Doubleword memory read/write operations
- Bitshift, multiply, divide instructions
- 4 I/O ports
- Note-based pixel display
v0.2
Under construction, planned features:
- 24-bit architecture
- 12+ registers
- 180Hz+
- Branch caching
- Inter-frame memory access
- Core specialization
- 8kW memory (24kB), loop memory
- Unlimited ROM
- 16W (48B) L1 cache
- 128W (384B) L2 cache